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perf(core): optimize LTDC-DSI ram usage by properly utilizing LTDC wi…
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TychoVrahe committed Jan 6, 2025
1 parent 1c59442 commit 22ab7e9
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Showing 12 changed files with 44 additions and 60 deletions.
6 changes: 3 additions & 3 deletions core/embed/io/display/ltdc_dsi/display_driver.c
Original file line number Diff line number Diff line change
Expand Up @@ -204,10 +204,10 @@ static bool display_ltdc_config_layer(LTDC_HandleTypeDef *hltdc,
LTDC_LayerCfgTypeDef LayerCfg = {0};

/* LTDC layer configuration */
LayerCfg.WindowX0 = 0;
LayerCfg.WindowX1 = LCD_WIDTH;
LayerCfg.WindowX0 = LCD_X_OFFSET;
LayerCfg.WindowX1 = DISPLAY_RESX + LCD_X_OFFSET;
LayerCfg.WindowY0 = LCD_Y_OFFSET;
LayerCfg.WindowY1 = LCD_HEIGHT + LCD_Y_OFFSET;
LayerCfg.WindowY1 = DISPLAY_RESY + LCD_Y_OFFSET;
LayerCfg.PixelFormat = PANEL_LTDC_PIXEL_FORMAT;
LayerCfg.Alpha = 0xFF; /* NU default value */
LayerCfg.Alpha0 = 0; /* NU default value */
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7 changes: 1 addition & 6 deletions core/embed/io/display/ltdc_dsi/display_fb.c
Original file line number Diff line number Diff line change
Expand Up @@ -125,17 +125,12 @@ bool display_get_frame_buffer(display_fb_info_t *fb_dest) {

uint32_t fb_stride = FRAME_BUFFER_PIXELS_PER_LINE * FB_PIXEL_SIZE;

// We may not utilize whole area of the display
addr += PANEL_USED_AREA_OFFSET_X * FB_PIXEL_SIZE;
addr += PANEL_USED_AREA_OFFSET_Y * fb_stride;

display_fb_info_t fb = {
.ptr = (void *)addr,
.stride = fb_stride,
};

size_t fb_size = fb_stride * (DISPLAY_RESY - 1) * FB_PIXEL_SIZE +
DISPLAY_RESX * FB_PIXEL_SIZE;
size_t fb_size = fb_stride * DISPLAY_RESY;

mpu_set_active_fb((void *)addr, fb_size);

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Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,7 @@
#define LCD_WIDTH 240
#define LCD_HEIGHT 320

#define LCD_X_OFFSET 0
#define LCD_Y_OFFSET 0

#define PANEL_DSI_MODE DSI_VID_MODE_NB_PULSES
Expand All @@ -47,6 +48,3 @@

// Pitch (in pixels) of the virtual frame buffer
#define FRAME_BUFFER_PIXELS_PER_LINE 240

#define PANEL_USED_AREA_OFFSET_X 0
#define PANEL_USED_AREA_OFFSET_Y 0
Original file line number Diff line number Diff line change
Expand Up @@ -41,9 +41,8 @@ static uint32_t gfxmmu_lut_config[2 * GFXMMU_LUT_SIZE] = {0};
static uint32_t lut_add_line(uint32_t line, uint32_t offset,
uint32_t first_pixel) {
uint32_t pixel_cut = first_pixel - 1;
uint32_t offset_px = PANEL_USED_AREA_OFFSET_X;
uint32_t first_block = (pixel_cut + offset_px) >> 2;
uint32_t last_block = (DISPLAY_RESX - 1 + offset_px - pixel_cut) >> 2;
uint32_t first_block = pixel_cut >> 2;
uint32_t last_block = (DISPLAY_RESX - 1 - pixel_cut) >> 2;

gfxmmu_lut_config[line * 2] = GFXMMU_LINE_L(offset, first_block, last_block);
gfxmmu_lut_config[line * 2 + 1] =
Expand All @@ -59,8 +58,8 @@ const uint32_t *panel_lut_get(void) {
const lut_def_t lut[] = {
{1, 13}, {1, 11}, {1, 9}, {1, 8}, {1, 6}, {2, 5}, {1, 4}, {2, 3},
{2, 2}, {4, 1}, {411, 1}, {12, 1}, {7, 2}, {6, 3}, {5, 4}, {4, 5},
{4, 6}, {3, 7}, {3, 8}, {3, 9}, {4, 10}, {2, 11}, {3, 12}, {2, 13},
{3, 14}, {2, 15}, {2, 16}, {2, 17}, {3, 18}, {1, 19}, {2, 20}, {2, 21},
{4, 6}, {3, 7}, {4, 8}, {2, 9}, {4, 10}, {2, 11}, {3, 12}, {2, 13},
{3, 14}, {2, 15}, {2, 16}, {2, 17}, {3, 18}, {1, 19}, {3, 20}, {1, 21},
{2, 22}, {2, 23}, {2, 24}, {1, 25}, {2, 26}, {2, 27}, {1, 28}, {2, 29},
{1, 30}, {1, 32}, {1, 33}, {1, 36},
};
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Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@
#define LCD_HEIGHT 520

#define LCD_Y_OFFSET 0
#define LCD_X_OFFSET 50

#define GFXMMU_LUT_FIRST 0
#define GFXMMU_LUT_LAST 519
Expand All @@ -46,13 +47,10 @@
//
// It's smaller than size of the virtual frame buffer
// due to used GFXMMU settings
#define PHYSICAL_FRAME_BUFFER_SIZE (772 * 1024)
#define PHYSICAL_FRAME_BUFFER_SIZE (765 * 1024)

// Pitch (in pixels) of the virtual frame buffer
#define FRAME_BUFFER_PIXELS_PER_LINE 768

#define VIRTUAL_FRAME_BUFFER_SIZE \
(FRAME_BUFFER_PIXELS_PER_LINE * LCD_HEIGHT * 4)

#define PANEL_USED_AREA_OFFSET_X 50
#define PANEL_USED_AREA_OFFSET_Y 0
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,8 @@
#define LCD_WIDTH 480
#define LCD_HEIGHT 480

#define LCD_Y_OFFSET 1
#define LCD_X_OFFSET 120
#define LCD_Y_OFFSET 121

#define GFXMMU_FB_SIZE 733936
#define GFXMMU_LUT_FIRST 0
Expand All @@ -42,17 +43,10 @@
#define PANEL_LTDC_PIXEL_FORMAT LTDC_PIXEL_FORMAT_ARGB8888

// Size of the physical frame buffer in bytes
//
// It's smaller than size of the virtual frame buffer
// due to used GFXMMU settings
#define PHYSICAL_FRAME_BUFFER_SIZE (184320 * 4)
#define PHYSICAL_FRAME_BUFFER_SIZE (240 * 240 * 4)

// Pitch (in pixels) of the virtual frame buffer
#define FRAME_BUFFER_PIXELS_PER_LINE 768
// // Pitch (in pixels) of the virtual frame buffer
#define FRAME_BUFFER_PIXELS_PER_LINE 240

// Size of the virtual frame buffer in bytes
#define VIRTUAL_FRAME_BUFFER_SIZE \
(FRAME_BUFFER_PIXELS_PER_LINE * LCD_HEIGHT * 4)

#define PANEL_USED_AREA_OFFSET_X 120
#define PANEL_USED_AREA_OFFSET_Y 120
#define VIRTUAL_FRAME_BUFFER_SIZE PHYSICAL_FRAME_BUFFER_SIZE
2 changes: 1 addition & 1 deletion core/embed/models/D002/boards/stm32u5g9j-dk.h
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@

#define DISPLAY_COLOR_MODE DMA2D_OUTPUT_ARGB8888
#define DISPLAY_PANEL_STM32U5A9J_DK
#define DISPLAY_GFXMMU 1
// #define DISPLAY_GFXMMU 1
#define DISPLAY_RESET_PIN GPIO_PIN_5
#define DISPLAY_RESET_PORT GPIOD
#define DISPLAY_RESET_CLK_ENA __HAL_RCC_GPIOD_CLK_ENABLE
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12 changes: 6 additions & 6 deletions core/embed/models/D002/memory.ld
Original file line number Diff line number Diff line change
Expand Up @@ -42,14 +42,14 @@ ASSETS_SECTOR_END = 0x1ff;
BOOTARGS_START = 0x30000000;
BOOTARGS_SIZE = 0x200;
FB1_RAM_START = 0x30000200;
FB1_RAM_SIZE = 0xc1000;
MAIN_RAM_START = 0x300c1200;
MAIN_RAM_SIZE = 0xec00;
FB1_RAM_SIZE = 0xbfe00;
MAIN_RAM_START = 0x300c0000;
MAIN_RAM_SIZE = 0xfe00;
SAES_RAM_START = 0x300cfe00;
SAES_RAM_SIZE = 0x200;
FB2_RAM_START = 0x300d0000;
FB2_RAM_SIZE = 0xc1000;
AUX1_RAM_START = 0x30191000;
AUX1_RAM_SIZE = 0xdf000;
FB2_RAM_SIZE = 0xc0000;
AUX1_RAM_START = 0x30190000;
AUX1_RAM_SIZE = 0xe0000;
CODE_ALIGNMENT = 0x400;
COREAPP_ALIGNMENT = 0x2000;
12 changes: 6 additions & 6 deletions core/embed/models/D002/model_D002.h
Original file line number Diff line number Diff line change
Expand Up @@ -87,19 +87,19 @@
#define BOOTARGS_SIZE 0x200

#define FB1_RAM_START 0x30000200
#define FB1_RAM_SIZE (772 * 1024)
#define FB1_RAM_SIZE (768 * 1024 - 512)

#define MAIN_RAM_START 0x300C1200
#define MAIN_RAM_SIZE (60 * 1024 - 512 - 512)
#define MAIN_RAM_START 0x300C0000
#define MAIN_RAM_SIZE (64 * 1024 - 512)

#define SAES_RAM_START 0x300CFE00
#define SAES_RAM_SIZE 512

#define FB2_RAM_START 0x300D0000
#define FB2_RAM_SIZE (772 * 1024)
#define FB2_RAM_SIZE (768 * 1024)

#define AUX1_RAM_START 0x30191000
#define AUX1_RAM_SIZE (892 * 1024)
#define AUX1_RAM_START 0x30190000
#define AUX1_RAM_SIZE (896 * 1024)

// misc
#define CODE_ALIGNMENT 0x400
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12 changes: 6 additions & 6 deletions core/embed/models/T3W1/memory.ld
Original file line number Diff line number Diff line change
Expand Up @@ -42,14 +42,14 @@ ASSETS_SECTOR_END = 0x1ff;
BOOTARGS_START = 0x30000000;
BOOTARGS_SIZE = 0x200;
FB1_RAM_START = 0x30000200;
FB1_RAM_SIZE = 0xc1000;
MAIN_RAM_START = 0x300c1200;
MAIN_RAM_SIZE = 0xec00;
FB1_RAM_SIZE = 0xbfe00;
MAIN_RAM_START = 0x300c0000;
MAIN_RAM_SIZE = 0xfe00;
SAES_RAM_START = 0x300cfe00;
SAES_RAM_SIZE = 0x200;
FB2_RAM_START = 0x300d0000;
FB2_RAM_SIZE = 0xc1000;
AUX1_RAM_START = 0x30191000;
AUX1_RAM_SIZE = 0xdf000;
FB2_RAM_SIZE = 0xc0000;
AUX1_RAM_START = 0x30190000;
AUX1_RAM_SIZE = 0xe0000;
CODE_ALIGNMENT = 0x400;
COREAPP_ALIGNMENT = 0x2000;
12 changes: 6 additions & 6 deletions core/embed/models/T3W1/model_T3W1.h
Original file line number Diff line number Diff line change
Expand Up @@ -87,19 +87,19 @@
#define BOOTARGS_SIZE 0x200

#define FB1_RAM_START 0x30000200
#define FB1_RAM_SIZE (772 * 1024)
#define FB1_RAM_SIZE (768 * 1024 - 512)

#define MAIN_RAM_START 0x300C1200
#define MAIN_RAM_SIZE (60 * 1024 - 512 - 512)
#define MAIN_RAM_START 0x300C0000
#define MAIN_RAM_SIZE (64 * 1024 - 512)

#define SAES_RAM_START 0x300CFE00
#define SAES_RAM_SIZE 512

#define FB2_RAM_START 0x300D0000
#define FB2_RAM_SIZE (772 * 1024)
#define FB2_RAM_SIZE (768 * 1024)

#define AUX1_RAM_START 0x30191000
#define AUX1_RAM_SIZE (892 * 1024)
#define AUX1_RAM_START 0x30190000
#define AUX1_RAM_SIZE (896 * 1024)

// misc
#define CODE_ALIGNMENT 0x400
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4 changes: 2 additions & 2 deletions core/site_scons/models/D002/discovery2.py
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ def configure(
"embed/io/display/ltdc_dsi/panels/stm32u5a9j-dk/stm32u5a9j-dk.c",
"embed/io/display/ltdc_dsi/display_fb.c",
"embed/io/display/ltdc_dsi/display_fb_rgb888.c",
"embed/io/display/ltdc_dsi/display_gfxmmu.c",
# "embed/io/display/ltdc_dsi/display_gfxmmu.c",
"embed/io/display/fb_queue/fb_queue.c",
]
paths += ["embed/io/display/inc"]
Expand Down Expand Up @@ -86,7 +86,7 @@ def configure(
features_available.append("display_rgba8888")
features_available.append("ui_color_32bit")

defines += (["USE_DMA2D"],)
defines += ["USE_DMA2D"]
features_available.append("dma2d")
sources += ["embed/gfx/bitblt/stm32/dma2d_bitblt.c"]

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