Adding support for ZCMT Extension for Code-Size Reduction in CVA6

[farhan-108]

Introduction

This PR implements the ZCMT extension in the CVA6 core, targeting the 32-bit embedded-class platforms. ZCMT is a code-size reduction feature that utilizes compressed table jump instructions (cm.jt and cm.jalt) to reduce code size for embedded systems
Note: Due to implementation complexity, ZCMT extension is primarily targeted at embedded class CPUs. Additionally, it is not compatible with architecture class profiles.(Ref. Unprivilege spec 27.20)

Key additions

• Added zcmt_decoder module for compressed table jump instructions: cm.jt (jump table) and cm.jalt (jump-and-link table)

• Implemented the Jump Vector Table (JVT) CSR to store the base address of the jump table in csr_reg module

• Implemented a return address stack, enabling cm.jalt to behave equivalently to jal ra (jump-and-link with return address), by pushing the return address onto the stack in zcmt_decoder module

Implementation in CVA6

The implementation of the ZCMT extension involves the following major modifications:

compressed decoder

The compressed decoder scans and identifies the cm.jt and cm.jalt instructions, and generates signals indicating that the instruction is both compressed and a ZCMT instruction.

zcmt_decoder

A new zcmt_decoder module was introduced to decode the cm.jt and cm.jalt instructions, fetch the base address of the JVT table from JVT CSR, extract the index and construct jump instructions to ensure efficient integration of the ZCMT extension in embedded platforms. Table.1 shows the IO port connection of zcmt_decoder module. High-level block diagram of zcmt implementation in CVA6 is shown in Figure 1.

Table. 1 IO port connection with zcmt_decoder module

Signals	IO	Description	Connection	Type
clk_i	in	Subsystem Clock	SUBSYSTEM	logic
rst_ni	in	Asynchronous reset active low	SUBSYSTEM	logic
instr_i	in	Instruction in	compressed_decoder	logic [31:0]
pc_i	in	Current PC	PC from FRONTEND	logic [CVA6Cfg.VLEN-1:0]
is_zcmt_instr_i	in	Is instruction a zcmt instruction	compressed_decoder	logic
illegal_instr_i	in	Is instruction a illegal instruction	compressed_decoder	logic
is_compressed_i	in	Is instruction a compressed instruction	compressed_decoder	logic
jvt_i	in	JVT struct from CSR	CSR	jvt_t
req_port_i	in	Handshake between CACHE and FRONTEND (fetch)	Cache	dcache_req_o_t
instr_o	out	Instruction out	cvxif_compressed_if_driver	logic [31:0]
illegal_instr_o	out	Is the instruction is illegal	cvxif_compressed_if_driver	logic
is_compressed_o	out	Is the instruction is compressed	cvxif_compressed_if_driver	logic
fetch_stall_o	out	Stall siganl	cvxif_compressed_if_driver	logic
req_port_o	out	Handshake between CACHE and FRONTEND (fetch)	Cache	dcache_req_i_t

branch unit condition

A condition is implemented in the branch unit to ensure that ZCMT instructions always cause a misprediction, forcing the program to jump to the calculated address of the newly constructed jump instruction.

JVT CSR

A new JVT csr is implemented in csr_reg which holds the base address of the JVT table. The base address is fetched from the JVT CSR, and combined with the index value to calculate the effective address.

No MMU

Embedded platform does not utilize the MMU, so zcmt_decoder is connected with cache through port 0 of the Dcache module for implicit read access from the memory.

Figure. 1 High level block diagram of ZCMT extension implementation

Known Limitations

The implementation targets 32-bit instructions for embedded-class platforms without an MMU. Since the core does not utilize an MMU, it is leveraged to connect the zcmt_decoder to the cache via port 0.

Testing and Verification

• Developed directed test cases to validate cm.jt and cm.jalt instruction functionality
• Verified correct initialization and updates of JVT CSR

Test Plan

A test plan is developed to test the functionality of ZCMT extension along with JVT CSR. Directed Assembly test executed to check the functionality.

Table. 2 Test plan

S.no	Features	Description	Pass/Fail Criteria	Test Type	Test status
1	cm.jt	Simple assembly test to validate the working of cm.jt instruction in  CV32A60x.	Check against Spike's ref. model	Directed	Pass
2	cm.jalt	Simple assembly test to validate the working of cm.jalt instruction in both CV32A60x.	Check against Spike's ref. model	Directed	Pass
3	cm.jalt with return address stack	Simple assembly test to validate the working of cm.jalt instruction with return address stack in both CV32A60x. It works as jump and link ( j ra, imm)	Check against Spike's ref. model	Directed	Pass
4	JVT CSR	Read and write base address of Jump table to JVT CSR	Check against Spike's ref. model	Directed	Pass

Note: Please find the test under CVA6_REPO_DIR/verif/tests/custom/zcmt"

[JeanRochCoulon]

@yanicasa

[JeanRochCoulon]

@ASintzoff

[github-actions]

❌ failed run, report available here.

[fatimasaleem]

Hi @JeanRochCoulon how can we know which line in the code this spyglass failure refers to? Some inputs to instance are not driven or unconnected

[JeanRochCoulon]

@ASintzoff do you know how to help ?

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[fatimasaleem]

@ASintzoff do you know how to help ?

@JeanRochCoulon
@farhan-108 found the issue and resolved it. Now only failure is due to the gate count increase.

[ASintzoff]

@ASintzoff do you know how to help ?

@JeanRochCoulon @farhan-108 found the issue and resolved it. Now only failure is due to the gate count increase.

is the extension completely optional? All the RTL added for Zcmt should be removed when the extension is not set. If not, it can increase the gate count.

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[JeanRochCoulon]

@farhan-108 can you rebase ? (mandatory to merge)

[farhan-108]

@farhan-108 can you rebase ? (mandatory to merge)

@JeanRochCoulon Done

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[cathales]

Ah, the pipeline passed for 2b395d1 but not for the current version of the branch 964b2b8

[cathales]

I have restarted the failed job and it passed. The remainder of the jobs (which were blocked by the failed job) are now running.

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