From a74a9546f15423d7ee8d35ee13e36486a07d4186 Mon Sep 17 00:00:00 2001 From: cepetr Date: Wed, 15 Nov 2023 15:15:46 +0100 Subject: [PATCH] fixup! chore(core, legacy, storage): refactor flash drivers --- core/embed/trezorhal/stm32u5/flash.c | 27 ++++----------------------- 1 file changed, 4 insertions(+), 23 deletions(-) diff --git a/core/embed/trezorhal/stm32u5/flash.c b/core/embed/trezorhal/stm32u5/flash.c index df051495f7f..a20cc579ade 100644 --- a/core/embed/trezorhal/stm32u5/flash.c +++ b/core/embed/trezorhal/stm32u5/flash.c @@ -34,30 +34,11 @@ #define FLASH_STATUS_ALL_FLAGS \ (FLASH_NSSR_PGSERR | FLASH_NSSR_PGAERR | FLASH_NSSR_WRPERR | FLASH_NSSR_EOP) -static bool g_otp_cache_valid = false; - static bool flash_sector_is_secure(uint32_t sector) { - static uint16_t bank1_secure_start = 0; - static uint16_t bank1_secure_end = 0; - static uint16_t bank2_secure_start = 0; - static uint16_t bank2_secure_end = 0; - - if (!g_otp_cache_valid) { - // reload OTP values - bank1_secure_start = (FLASH->SECWM1R1 & FLASH_SECWM1R1_SECWM1_PSTRT) >> - FLASH_SECWM1R1_SECWM1_PSTRT_Pos; - bank1_secure_end = (FLASH->SECWM1R1 & FLASH_SECWM1R1_SECWM1_PEND) >> - FLASH_SECWM1R1_SECWM1_PEND_Pos; - - bank2_secure_start = - 256 + ((FLASH->SECWM2R1 & FLASH_SECWM1R1_SECWM1_PSTRT) >> - FLASH_SECWM1R1_SECWM1_PSTRT_Pos); - bank2_secure_end = 256 + ((FLASH->SECWM2R1 & FLASH_SECWM1R1_SECWM1_PEND) >> - FLASH_SECWM1R1_SECWM1_PEND_Pos); - } - - return (sector >= bank1_secure_start && sector <= bank1_secure_end) || - (sector >= bank2_secure_start && sector <= bank2_secure_end); + // We always return true since the entire flash memory is currently secure - + // partially through option bytes and partially through FLASH controller + // settings + return true; } const void *flash_get_address(uint16_t sector, uint32_t offset, uint32_t size) {